The subject matter disclosed herein relates generally to integrated circuits. More specifically, the disclosure provided herein relates to a method, an integrated circuit, and a design structure for including programmable gate arrays as data port drivers of spare latches.
Typically, design changes come up in the final phase of the circuit design, which need to be implemented without affecting the processed sections. These changes are conventionally known as an engineering change order (ECO). In order to satisfy the need to implement these ECOs, spare circuitry is normally included in the circuit design. Spare latches are an example of this spare circuitry and are often used to implement the ECOs.
The input drivers connected to the data ports of the spare latches that are also used to implement the ECOs sometimes do not have enough drive strength to drive the latches. This can result in slow violations and other timing related problems. Further, it is difficult to remove an existing input driver when an input driver with a different functionality is required by an ECO.